SN74LS85N

SN74LS85N

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These four-bit magnitude comparators perform comparison of straight binary and straight BCD (8-4-2-1) codes. Three fully decoded decisions about two 4-bit words (A, B) are made and are externally available at three outputs. These devices are fully expandable to any number of bits without external gates. Words of greater length may be compared by connecting comparators in cascade. The A > B, A < B, and A = B outputs of a stage handling less-significant bits are connected to the corresponding A > B, A < B, and A = B inputs of the next stage handling more-significant bits. The stage handling the least-significant bits must have a high-level voltage applied to the A = B input. The cascading paths of the '85, 'LS85, and 'S85 are implemented with only a two-gate-level delay to reduce overall comparison times for long words. An alternate method of cascading which further reduces the comparison time is shown in the typical application data.
Description: 4-Bit Magnitude Comparator Features: Four Independent Magnitude Comparators Open Collector Outputs for Direct Interface to Other Logic Families Outputs Directly Interface to CMOS, NMOS, and TTL Outputs Can Be Used in Wired-OR Circuits Input Clamp Diodes Limit High-Speed Termination Effects Low Power Consumption High Noise Immunity Available in 16-Pin Plastic DIP, 16-Pin SOIC, and 16-Pin TSSOP Packages Application: Digital Comparators Digital Filters Digital Control Systems Digital Signal Processing Digital Timing Circuits Digital Logic Circuits (For reference only)

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