BUY SN74LS175N https://www.utsource.net/itm/p/1495701.html
High Gain, High Linearity Active Bias Low Noise Amplifier
Description: Quadruple Positive-Edge-Triggered D Flip-Flops
Features:
Input Clamp Diodes Limit High-Speed Termination Effects
Outputs Source/Sink 24 mA
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range of 3 V to 15 V
Low Power Consumption, 80-μA Max ICC
Latch-Up Performance Exceeds 250 mA Per JESD 78, Class II
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Application:
Synchronous 4-Bit Counters
Shift Registers
Data Storage Elements
Multiply/Divide Circuits
High-Speed Address Comparators
(For reference only)
