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Description: Quad 2-Input NAND Gate Features: Low Power Consumption High Noise Immunity Outputs Directly Interface to CMOS, NMOS, and TTL Balanced Propagation Delay and Transition Times Significantly Lower Power Than LSTTL Logic ICs Outputs Source/Sink 24 mA Input Clamp Diodes Limit High-Speed Termination Effects 5V, 10V, and 15V Parametric Ratings Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of B Series CMOS Devices” Applications: High-Speed Data Processing High-Speed Data Acquisition High-Speed Data Transfer High-Speed Data Conversion High-Speed Data Storage High-Speed Data Analysis
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